Retiming is an optimizing algorithm for improving the circuit performance. It moves registers across combo-logic without affecting the functionality of design at primary input/output ports. Registers shall be added and to or removed from the design while performing retiming. However, additional registers do not add clock latency to the design’s performance.
How Retiming works
Critical paths are examined along with their non-critical adjacent paths. There shall be many non-critical paths with positive slack. The strategy is to leverage positive slack on one side of a sequential element to balance negative slack on the other. In essence, the process is
a) to perform timing analysis of the design.
b) calculate slack on registers.
c) sort the registers based on slack.
d) balance the path by moving registers backward or forward across combo-logic. New registers shall be added or existing registers shall be merged.
Above steps redistributes some of the timing delay and the result is balanced slack on both sides of sequential element.
Following figure illustrate retiming:
Please note that retiming is possible only when registers have proper timing budget i.e. positive slack on side and negative slack on other.
